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| SEMICONDUCTOR CA555, CA555C, LM555, LM555C, NE555 Timers for Timing Delays and Oscillator Application in Commercial, Industrial and Military Equipment Description The CA555 and CA555C are highly stable timers for use in precision timing and oscillator applications. As timers, these monolithic integrated circuits are capable of producing accurate time delays for periods ranging from microseconds through hours. These devices are also useful for astable oscillator operation and can maintain an accurately controlled free running frequency and duty cycle with only two external resistors and one capacitor. The circuits of the CA555 and CA555C may be triggered by the falling edge of the waveform signal, and the output of these circuits can source or sink up to a 200mA current or drive TTL circuits. These types are direct replacements for industry types in packages with similar terminal arrangements e.g. SE555 and NE555, MC1555 and MC1455, respectively. The CA555 type circuits are intended for applications requiring premium electrical performance. The CA555C type circuits are intended for applications requiring less stringent electrical characteristics. May 1997 Features * * * * * * * * Accurate Timing From Microseconds Through Hours Astable and Monostable Operation Adjustable Duty Cycle Output Capable of Sourcing or Sinking up to 200mA Output Capable of Driving TTL Devices Normally ON and OFF Outputs High Temperature Stability . . . . . . . . . . . . . . 0.005%/oC Directly Interchangeable with SE555, NE555, MC1555, and MC1455 * Pulse Generation * Pulse Detector * Pulse Width and Position Modulation PKG. NO. E8.3 M8.15 M8.15 T8.C E8.3 M8.15 M8.15 T8.C E8.3 E8.3 E8.3 Applications * Precision Timing * Sequential Timing * Time Delay Generation Ordering Information PART NUMBER TEMP. (BRAND) RANGE (oC) CA0555E -55 to 125 CA0555M (555) -55 to 125 CA0555M96 (555) -55 to 125 CA0555T -55 to 125 CA0555CE 0 to 70 CA0555CM (555C) 0 to 70 CA0555CM96 (555C) 0 to 70 CA0555CT 0 to 70 LM555N -55 to 125 LM555CN 0 to 70 NE555N 0 to 70 NOTE: Denotes Tape and Reel PACKAGE 8 Ld PDIP 8 Ld SOIC 8 Ld SOIC 8 Pin Metal Can 8 Ld PDIP 8 Ld SOIC 8 Ld SOIC 8 Pin Metal Can 8 Ld PDIP 8 Ld PDIP 8 Ld PDIP Pinouts CA555, CA555C (PDIP, SOIC) LM555, LM555C, NE555 (PDIP) TOP VIEW GND 1 TRIGGER 2 OUTPUT 3 RESET 4 8 V+ 7 DISCHARGE 6 THRESHOLD 5 CONTROL VOLTAGE Functional Block Diagram V+ 8 TRIGGER CONTROL VOLTAGE 5 2 THRESHOLD 3 OUTPUT 6 THRESHOLD COMPAR 7 CA555, CA555C (METAL CAN) TOP VIEW V+ 8 GND 1 TRIGGER 2 OUTPUT 3 4 RESET 5 7 DISCHARGE 6 THRESHOLD CONTROL VOLTAGE TAB RESET 4 FLIP-FLOP 1 GND CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright (c) Harris Corporation 1997 File Number 834.4 8-3 DISCHARGE OUTPUT TRIGGER COMPAR CA555, CA555C, LM555, LM555C, NE555 Absolute Maximum Ratings DC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V Thermal Information Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) Metal Can Package . . . . . . . . . . . . . . . 170 85 PDIP Package . . . . . . . . . . . . . . . . . . . 100 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 160 N/A Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range CA555, LM555 . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CA555C, LM555C, NE555 . . . . . . . . . . . . . . . . . . . . .0oC to 70oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications TA = 25oC, V+ = 5V to 15V Unless Otherwise Specified CA555, LM555 CA555C, LM555C, NE555 MIN 4.5 0.4 2.6 9 2.75 12.75 TYP 3 10 (2/3)V+ 1.67 5 0.5 0.1 0.7 0.1 3.33 10 0.25 0.1 0.4 2.0 2.5 3.3 13.3 12.5 1 50 0.1 MAX 16 6 15 0.25 1.0 4 11 0.35 0.25 0.75 2.5 UNITS V mA mA V V V A A V mA V V V V V V V V V V V % ppm/oC %/V PARAMETER DC Supply Voltage DC Supply Current (Low State), (Note 2) Threshold Voltage Trigger Voltage SYMBOL V+ I+ TEST CONDITIONS MIN 4.5 TYP 3 10 (2/3)V+ 1.67 5 0.5 0.1 0.7 0.1 3.33 10 0.1 0.1 0.4 2.0 2.5 3.3 13.3 12.5 0.5 30 0.05 MAX 18 5 12 1.9 5.2 0.25 1.0 3.8 10.4 0.25 0.15 0.5 2.2 2 100 0.2 V+ = 5V, RL = V+ = 15V, RL = - VTH V+ = 5V V+ = 15V 1.45 4.8 - Trigger Current Threshold Current (Note 3) Reset Voltage Reset Current Control Voltage Level V+ = 5V V+ = 15V Output Voltage Low State VOL V+ = 5V, ISINK = 5mA ISINK = 8mA V+ = 15V, ISINK = 10mA ISINK = 50mA ISINK = 100mA ISINK = 200mA Output Voltage High State VOH V+ = 5V, ISOURCE = 100mA ITH 0.4 2.9 9.6 3.0 V+ = 15V, ISOURCE = 100mA 13.0 ISOURCE = 200mA Timing Error (Monostable) Frequency Drift with Temperature Drift with Supply Voltage R1, R2 = 1k to 100k, C = 0.1F Tested at V+ = 5V, V+ = 15V - 8-4 CA555, CA555C, LM555, LM555C, NE555 Electrical Specifications TA = 25oC, V+ = 5V to 15V Unless Otherwise Specified (Continued) CA555, LM555 PARAMETER Output Rise Time Output Fall Time NOTES: 2. When the output is in a high state, the DC supply current is typically 1mA less than the low state value. 3. The threshold current will determine the sum of the values of R1 and R2 to be used in Figure 4 (astable operation); the maximum total R1 + R2 = 20M. SYMBOL tR tF TEST CONDITIONS MIN TYP 100 100 MAX CA555C, LM555C, NE555 MIN TYP 100 100 MAX UNITS ns ns Schematic Diagram V+ 8 4.7K 830 D1 4.7K D2 Q10 Q3 Q4 1K 5K 6.8K THRESHOLD COMPARATOR TRIGGER COMPARATOR FLIP-FLOP OUTPUT Q16 Q19 Q20 3.9K OUTPUT 3 THRESHOLD 6 Q1 Q2 Q5 5K 10K CONTROL VOLTAGE 5 2 TRIGGER RESET 4 RESET 7 DISCHARGE 1 VQ6 DISCHARGE 100 Q8 100K Q9 Q11 Q12 Q13 5K Q14 Q7 4.7K 7K D3 D4 Q18 220 Q17 Q15 4.7K Q21 NOTE: Resistance values are in ohms. Typical Applications Reset Timer (Monostable Operation) Figure 1 shows the CA555 connected as a reset timer. In this mode of operation capacitor CT is initially held discharged by a transistor on the integrated circuit. Upon closing the "start" switch, or applying a negative trigger pulse to terminal 2, the integral timer flip-flop is "set" and releases the short circuit across CT which drives the output voltage "high" (relay energized). The action allows the voltage across the capacitor to increase exponentially with the constant t = R1CT. When the voltage across the capacitor equals 2/3 V+, the comparator resets the flip-flop which in turn discharges the capacitor rapidly and drives the output to its low state. 8-5 CA555, CA555C, LM555, LM555C, NE555 RESET R1 7 CA555 6 1 2 CT 4.7K 0.01F S1 START 5 10K RELAY COIL 680 4 EO 3 1N4001 CAPACITANCE (F) 8 10 R1 = 1k 10k 100k 0.1 1M 10M 0.01 V+ 5V 100 TA = 25oC V+ = 5V 1 680 0.001 10-5 10-4 10-3 10-2 TIME DELAY(s) 10-1 1 10 NOTE: All resistance values are in ohms. FIGURE 1. RESET TIMER (MONOSTABLE OPERATION) FIGURE 3. TIME DELAY vs RESISTANCE AND CAPACITANCE Since the charge rate and threshold level of the comparator are both directly proportional to V+, the timing interval is relatively independent of supply voltage variations. Typically, the timing varies only 0.05% for a 1V change in V+. Applying a negative pulse simultaneously to the reset terminal (4) and the trigger terminal (2) during the timing cycle discharges CT and causes the timing cycle to restart. Momentarily closing only the reset switch during the timing interval discharges CT, but the timing cycle does not restart. Figure 2 shows the typical waveforms generated during this mode of operation, and Figure 3 gives the family of time delay curves with variations in R1 and CT. SWITCH S1 "OPEN" 3V INPUT VOLTAGE (TERMINAL 2) SWITCH S1 "CLOSED" 0 3.3V CAPACITOR VOLTAGE (TERMINALS 6, 7) 0 tD 5V OUTPUT VOLTAGE (TERMINAL 3) 0 Repeat Cycle Timer (Astable Operation) Figure 4 shows the CA555 connected as a repeat cycle timer. In this mode of operation, the total period is a function of both R1 and R2. V+ 5V R1 7 R2 6 1 2 CA555 5 4 8 EO 3 RELAY COIL CT 0.01F FIGURE 4. REPEAT CYCLE TIMER (ASTABLE OPERATION) T = 0.693 (R1 + 2R2) CT = t1 + t2 where t1 = 0.693 (R1 + R2) CT and t2 = 0.693 (R2) CT the duty cycle is: t1 R1 + R2 --------------- = ----------------------t 1 + t 2 R 1 + 2R 2 FIGURE 2. TYPICAL WAVEFORMS FOR RESET TIMER Typical waveforms generated during this mode of operation are shown in Figure 5. Figure 6 gives the family of curves of free running frequency with variations in the value of (R1 + 2R2) and CT . 8-6 CA555, CA555C, LM555, LM555C, NE555 t1 5V 10 CAPACITANCE (F) R1 + 2R2 = 1k 1 100k 1M 0.1 10M 10k t2 100 TA = 25oC, V+ = 5V 0 3.3V 0.01 1.7V 0.001 10-1 1 10 102 103 104 105 0 Top Trace: Output voltage (2V/Div. and 0.5ms/Div.) Bottom Trace: Capacitor voltage (1V/Div. and 0.5ms/Div.) FIGURE 5. TYPICAL WAVEFORMS FOR REPEAT CYCLE TIMER FREQUENCY (Hz) FIGURE 6. FREE RUNNING FREQUENCY OF REPEAT CYCLE TIMER WITH VARIATION IN CAPACITANCE AND RESISTANCE Typical Performance Curves MINIMUM PULSE WIDTH (ns) 150 10 TA = -55oC 0oC 25oC 70oC 125oC SUPPLY CURRENT (mA) 9 8 7 6 5 4 3 2 1 0 0.1 0.2 0.3 0.4 0 2.5 5 7.5 10 12.5 15 SUPPLY VOLTAGE (V) MINIMUM TRIGGER (PULSE) VOLTAGE (x V+) (NOTE) 50oC 25oC TA = 125oC 100 50 NOTE: Where x is the decimal multiplier of the supply voltage. FIGURE 7. MINIMUM PULSE WIDTH vs MINIMUM TRIGGER VOLTAGE SUPPLY VOLTAGE - OUTPUT VOLTAGE (V) 2.0 OUTPUT VOLTAGE - LOW STATE (V) TA = -55oC 1.6 25oC FIGURE 8. SUPPLY CURRENT vs SUPPLY VOLTAGE 10.0 V+ = 5V TA = -55oC 1.0 25oC 125oC 1.2 125oC 0.8 0.1 0.4 5V V+ 15V 0 1 10 SOURCE CURRENT (mA) 100 0.01 1 10 SINK CURRENT (mA) 100 FIGURE 9. OUTPUT VOLTAGE DROP (HIGH STATE) vs SOURCE CURRENT FIGURE 10. OUTPUT VOLTAGE LOW STATE vs SINK CURRENT 8-7 CA555, CA555C, LM555, LM555C, NE555 Typical Performance Curves 10.0 OUTPUT VOLTAGE - LOW STATE (V) OUTPUT VOLTAGE - LOW STATE (V) V+ = 10V TA = -55oC 1.0 125oC 25oC 0.1 25oC (Continued) 10.0 V+ = 15V -55oC 1.0 125oC 25oC 0.1 TA = -55oC 125oC 0.01 1 10 SINK CURRENT (mA) 100 0.01 1 10 SINK CURRENT (mA) 100 FIGURE 11. OUTPUT VOLTAGE LOW STATE vs SINK CURRENT FIGURE 12. OUTPUT VOLTAGE LOW STATE vs SINK CURRENT 1.100 TA = 25oC NORMALIZED DELAY TIME 1.000 NORMALIZED DELAY TIME 1.005 0.990 0.995 0.980 0 2.5 5 7.5 10 12.5 15 17.5 SUPPLY VOLTAGE (V) 0.985 -75 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 13. DELAY TIME vs SUPPLY VOLTAGE FIGURE 14. DELAY TIME vs TEMPERATURE PROPAGATION DELAY TIME (ns) 300 250 200 150 100 50 0 oC 25oC 70oC 125oC 0 0.1 0.2 0.3 0.4 MINIMUM TRIGGER (PULSE) VOLTAGE (x V+) (NOTE) TA = -55oC NOTE: Where x is the decimal multiplier of the supply voltage. FIGURE 15. PROPAGATION DELAY TIME vs TRIGGER VOLTAGE 8-8 |
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